sl393 system logic semiconductor sls low power low offset voltage dual comparators the sl393 consists of two independent precision voltage comparators with an offset voltage specification as low as 2.0 mv max for two comparators which were designed specifically to operate from a single power supply over a wide range of voltages. application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time dela y generators; wide range vco; mos clock timers; multivibrators and high voltage digital logic gates. single or split supply operation low input bias current low input offset current input common mode voltage range to gnd low output saturation voltage ttl a nd cmos compatible ordering information SL393N plastic sl393d soic t a = 0 to 70 c for all packages . logic diagram pin 8 = v cc pin 4 = gnd pin assignment
sl393 system logic semic onductor sls maximum ratings * symbol parameter value unit v cc power supply voltages single supply split supplies 36 18 v v idr input differential voltage range 36 v v ic r input common mode voltage range (1) - 0.3 to v cc v i sc output short circuit to ground continuous i in input current, per pin (2) 50 ma t j junction temperature plastic packages 150 c tstg storage temperature - 65 to +150 c t l lead temperature, 1mm from case for 10 seconds 260 c p d power dissipation @t a =25 c plastic package derate above 25 c 570 5.7 m w mw/ c * maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommende d operating conditions. notes: 1. split power supplies. 2. v in < - 0.3v. this input current will only exist when voltage at any of the input leads is driven negative. recommended operating conditions symbol parameter min max unit v cc dc supply voltage 2.5 or 5.0 15 or 30 v t a operating temperature, all package types 0 +70 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage h igher than maximum rated voltages to this high - impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ) . unused outputs must be left open.
sl393 system logic semiconductor sls dc electrical characteristics (t a =0 to +70 c) guaranteed limit symbol parameter test conditions min typ max unit v io input offset voltage v 0 =1.4v v cc =5.0 - 30v;r s 100 w v icr =0v - (v cc - 1.5)v - 9.0 mv i ib input bias current v 0 =1.4v v cc =5.0 - 30v v icr =0v - (v cc - 1.5)v - 400 na i io input offset current v 0 =1.4v v cc =5.0 - 30v v icr =0v - (v cc - 1.5)v - 150 na v icr input common mode voltage range v cc =5.0 - 30v 0 v cc - 2.0v v i cc supply current r l = ,v cc =5.0 r l = ,v cc =30v - - 1.0* 2.5* ma a vol voltage gain v cc =15v, r l =15k w - 200* - v/mv t 1 large signal response time v in =ttl logic swing, v ref =1.4v, v cc =5.0v, r l =5.1k w , v rl =5.0v - 300* - ns t 2 response time (note 6) v cc =5.0v, r l =5.1k w , v rl =5.0v - 1.3* - m s i sink output sink curre nt v i ( - )=1.0v, v i (+)=0v, v 0 1.5v, v cc =5.0v 6.0* - - ma v sat saturation voltage v i ( - )=1.0v, v i (+)=0v, i sink 4.0ma, v cc =5.0v - - 700 mv i ol output leakage current v i (+)=1.0v, v i ( - )=0v, v 0 =5.0v v 0 =30v 0.1* 1000 na v idr differential input voltage range all v in 3 gnd or v - supply (if used) v cc v *=@25 c
sl393 system logic semic onductor sls typical performance characteristics (v cc =1.5v, t a =+25 c, (each comporator)) figure 1. input bias current versus power supply voltage figure 2. output saturation voltage versus output sink current figure 3. output saturation voltage versus output sink current figure 4. power supply current versus power supply voltage figure 5. power supply current versus power supply voltage
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